Magnetic current imaging is a technique for imaging buried currents in integrated circuits (ICs) and electronic packaged devices by detecting their magnetic fields (E. F. Fleet, et al., “High-Tc scanning squid microscopy of active circuits” in IEEE Transactions on Applied Superconductivity, 9(2):4103, 1999; and L. A. Knauss, et al., “Detecting power shorts from front and backside of IC packages using scanning squid microscopy” In Proc. Of the 25th Int'l Symp. On Testing and Failure Analysis, page 11, Santa Clara, Calif., November 1999).
The detected magnetic fields are used to map currents in the device by using a Fourier Transform back-evolution technique (E. F. Fleet, et al., “High-Tc scanning squid microscopy of active circuits,” IEEE Transactions on Applied Superconductivity, 9(2):4103, 1999; and J. P. Wikswo, “SQUID Sensors: Fundamentals, Fabrication and Applications” in chapter “The Magnetic Inverse Problem for NDE”, pages 629-695. Kluwer Academic Publishers, The Netherlands, 1996). The resulting current map is compared to a circuit diagram, an optical/infrared image or a non-failing part design to determine the fault location.
DC SQUIDs and low-frequency SQUID microscopy (L. A. Knauss, et al., “Scanning squid microscopy for current imaging” in Microelectronics Reliability, 41: 1211-1229, 1991; H. Weinstock, editor, “SQUID Sensors: Fundamentals, Fabrication and Applications” in Kluwer Academic Publishers, The Netherlands, 1996; and T. Van Duzer, et al., “Principles of Superconductive Devices and Circuit” in Prentice Hall, N.J., 2nd edition, 1999) are commonly used today for localizing shorts and high resistance defects and have become mainstream tools for package-level fault isolation (R. Dias, et al., “Integration of squid microscopy into FA flow” In Proc. Of the 27th Int'l Symp. On Testing and Failure Analysis,” Santa Clara, Calif., November 2001) and effective tools for die-level fault isolation (D. P. Vallet, “Scanning squid microscopy for die level fault isolation” In Proc. Of the 28th Int'l Symp. On Testing and Failure Analysis, pages 391-396, Phoenix, Ariz., November 2002, and L. A. Knauss, et al., “Advances in scanning squid microscopy for die-level and package-level fault isolation” in Microelectronics Reliability, 43: 1657-1662, 2003).
DC SQUIDs and low-frequency SQUID microscopy have not been applied to open defects, however, since DC or low frequency signals cannot propagate along defective traces and thus do not produce currents in a circuit having an “open” defect.
Electrical opens are especially difficult to isolate since they do not conduct current. Unlike an open, a short may be isolated through thermal or current imaging techniques, and images with x-rays. However, open circuit failures which may be any of cracked metal traces, delaminated vias, C4 non-wet defects, Plated Through Hole (PTH) cracks, and any other package or interconnect structure defects, result in an electrically open signal line which renders the device unusable.
Currently, the main approach for localizing open circuit defects is Time Domain Reflectometry (TDR) (D. Searls, et al., “Time domain reflectometry as a device packaging level failure analysis and failure localization tool” in Proc. Of the 16th Int'l Symp. On Testing and Failure Analysis, pages 285-291, Bellevue, Wash., November 2000; D. A. Smolyansky, “Electronic package failure analysis using TDR” in Proc. Of the 26th Int'l Symp. On Testing and Failure Analysis, pages 277-283, Bellevue, Wash., November 2000; and T. K. Long, et al., “Time domain reflectometry technique for failure analysis” in Proc. Of the 30th Int'l Symp. On Testing and Failure Analysis, pages 61-622, Worcester, Mass., November 2004).
In TDR, a short electrical pulse is sent into a device under study, and the time to receive reflections is monitored. By comparing the reflected signal with that of non-defective parts, it is possible to localize a defect with a localization accuracy of up to 500 μm. In practice, 1-2 mm is the typical TDR localization accuracy, which is limited by the complex nature of wiring paths in a packaging under study.
Beyond the TDR, the only method for localizing the open defects is layer by layer deprocessing coupled with physical inspection under an optical microscope. The procedure may take weeks, and many times a defect may be missed through the optical inspection, or may actually be lost in the mechanical deprocessing.
In current failure analysis practice, shorts represent approximately 20% of the defects, high resistance shorts 10-15% of the defects, and opens are 60-70% of the defects encountered in packages. At a die level, shorts and opens appear with approximate equal probability.
Thus, there is strong interest from the semiconductor manufacturing industry in additional techniques for non-destructive localization of open circuit failures in electronic devices.